//Copyright (C)2014-2024 Gowin Semiconductor Corporation.
//All rights reserved.


1. PnR Messages

  <Report Title>: PnR Report
  <Design File>: /home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/hdmi_720p/impl/gwsynthesis/hdmi.vg
  <Physical Constraints File>: /home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/hdmi_720p/src/hdmi.cst
  <Timing Constraints File>: /home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/hdmi_720p/src/hdmi.sdc
  <Tool Version>: V1.9.11
  <Part Number>: GW1NSR-LV4CQN48PC6/I5
  <Device>: GW1NSR-4C
  <Created Time>:Tue Apr  8 14:17:08 2025


2. PnR Details

  Running placement:
    Placement Phase 0: CPU time = 0h 0m 0.321s, Elapsed time = 0h 0m 0.327s
    Placement Phase 1: CPU time = 0h 0m 0.254s, Elapsed time = 0h 0m 0.252s
    Placement Phase 2: CPU time = 0h 0m 0.539s, Elapsed time = 0h 0m 0.543s
    Placement Phase 3: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
    Total Placement: CPU time = 0h 0m 5s, Elapsed time = 0h 0m 5s
 Running routing:
    Routing Phase 0: CPU time = 0h 0m 0.001s, Elapsed time = 0h 0m 0.012s
    Routing Phase 1: CPU time = 0h 0m 0.314s, Elapsed time = 0h 0m 0.325s
    Routing Phase 2: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
    Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s
    Total Routing: CPU time = 0h 0m 3s, Elapsed time = 0h 0m 3s
 Generate output files:
    CPU time = 0h 0m 0.881s, Elapsed time = 0h 0m 0.789s

 Total Time and Memory Usage: CPU time = 0h 0m 9s, Elapsed time = 0h 0m 8s, Peak memory usage = 247MB


3. Resource Usage Summary

  --------------------------------------------------------------------------------
  Resources                   | Usage                               | Utilization
  --------------------------------------------------------------------------------
  Logic                       | 1042/4608                           |  23%
    --LUT,ALU,ROM16           | 1042(905 LUT, 137 ALU, 0 ROM16)     | -
    --SSRAM(RAM16)            | 0                                   | -
  Register                    | 634/3573                            |  18%
    --Logic Register as Latch | 0/3456                              |  0%
    --Logic Register as FF    | 634/3456                            |  19%
    --I/O Register as Latch   | 0/117                               |  0%
    --I/O Register as FF      | 0/117                               |  0%
  CLS                         | 873/2304                            |  38%
  I/O Port                    | 10/39                               |  26%
  I/O Buf                     | 6                                   | -
    --Input Buf               | 2                                   | -
    --Output Buf              | 4                                   | -
    --Inout Buf               | 0                                   | -
  IOLOGIC                     | 6/53                                | 12%
    --OSER10                  | 3
  BSRAM                       | 1/10                                | 10%
    --pROM                    | 1
  ================================================================================



4. I/O Bank Usage Summary

  --------------------------------------
  I/O Bank  | Usage       | Utilization 
  --------------------------------------
  bank 0   | 0/9         | 0%          
  bank 1   | 1/10        | 10%         
  bank 2   | 8/9         | 89%         
  bank 3   | 1/11        | 10%         
  ======================================


5. Clock Resource Usage Summary

  ------------------------------------------
  Clock Resource| Usage         | Utilization 
  ------------------------------------------
  PRIMARY       | 1/8           | 13%
  LW            | 1/8           | 13%
  GCLK_PIN      | 1/5           | 20%
  CLKDIV        | 1/6           | 17%
  PLLVR         | 1/2           | 50%
  ==========================================


6. Global Clock Signals

  -------------------------------------------
  Signal         | Global Clock   | Location
  -------------------------------------------
  clk_p          | PRIMARY        |  LEFT RIGHT
  svo_hdmi_inst/n107_5| LW             |  -
  clk_p5         | HCLK           | RIGHT[1]
  ===========================================


7. Pinout by Port Name

--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Port Name    | Diff Pair | Loc./Bank     | Constraint | Dir.  | Site     | CFG             | IO Type    | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref       | Single Resistor | Diff Resistor | BankVccio 
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
clk          | -         | 45/1          | Y          | in    | IOT13[A] | LPLL_T_in       | LVCMOS33   | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2       
resetn       | -         | 14/3          | Y          | in    | IOB4[B]  | -               | LVCMOS18   | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8       
tmds_clk_p   | tmds_clk_n | 28,27/2       | Y          | out   | IOR17    | -               | LVCMOS33D  | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3       
tmds_d_p[0]  | tmds_d_n[0] | 30,29/2       | Y          | out   | IOR15    | -               | LVCMOS33D  | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3       
tmds_d_p[1]  | tmds_d_n[1] | 32,31/2       | Y          | out   | IOR11    | GCLKT_3         | LVCMOS33D  | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3       
tmds_d_p[2]  | tmds_d_n[2] | 35,34/2       | Y          | out   | IOR2     | RPLL_T_in       | LVCMOS33D  | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3       
====================================================================================================================================================================================================================




8. All Package Pins

-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Loc./Bank| Signal       | Dir.  | Site     | CFG             | IO Type  | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref       | Single Resistor | Diff Resistor | Bank Vccio
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
3/0      | -            | in    | IOT2[A]  | TDI             | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
4/0      | -            | out   | IOT2[B]  | TDO             | LVCMOS18 | 8     | NONE      | NA        | NA         | OFF        | NA         | NA              | NA            | 1.8  
6/0      | -            | in    | IOT3[A]  | TMS             | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
7/0      | -            | in    | IOT3[B]  | TCK             | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
8/0      | -            | in    | IOT4[B]  | JTAGSEL_N       | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
9/0      | -            | in    | IOT5[B]  | DONE            | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
10/0     | -            | in    | IOT7[A]  | MODE1           | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
1/0      | -            | in    | IOT10[A] | MCLK/D4         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
2/0      | -            | in    | IOT10[B] | MCS_N/D5        | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
48/1     | -            | in    | IOT11[A] | MO/D6           | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
47/1     | -            | in    | IOT11[B] | MI/D7           | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
45/1     | clk          | in    | IOT13[A] | LPLL_T_in       | LVCMOS33 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
46/1     | -            | in    | IOT13[B] | LPLL_C_in       | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
43/1     | -            | in    | IOT17[A] | GCLKT_0         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
44/1     | -            | in    | IOT17[B] | GCLKC_0         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
41/1     | -            | in    | IOT20[A] | GCLKT_1         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
42/1     | -            | in    | IOT20[B] | GCLKC_1         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
39/1     | -            | in    | IOT26[A] | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
40/1     | -            | in    | IOT26[B] | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.2  
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
13/3     | -            | in    | IOB4[A]  | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
14/3     | resetn       | in    | IOB4[B]  | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
15/3     | -            | in    | IOB5[A]  | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
p1-22/3  | -            | in    | IOB5[B]  | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
16/3     | -            | in    | IOB6[A]  | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
17/3     | -            | in    | IOB6[B]  | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
p1-19/3  | -            | in    | IOB7[A]  | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-18/3  | -            | in    | IOB7[B]  | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
18/3     | -            | in    | IOB13[A] | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
19/3     | -            | in    | IOB13[B] | -               | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
p1-17/3  | -            | in    | IOB14[A] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-16/3  | -            | in    | IOB14[B] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-15/3  | -            | in    | IOB15[A] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-14/3  | -            | in    | IOB15[B] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
20/3     | -            | in    | IOB16[A] | GCLKT_5         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
21/3     | -            | in    | IOB16[B] | GCLKC_5         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
22/3     | -            | in    | IOB22[A] | GCLKT_4         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
23/3     | -            | in    | IOB22[B] | GCLKC_4         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 1.8  
p1-13/3  | -            | in    | IOB23[A] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-10/3  | -            | in    | IOB24[B] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-9/3   | -            | in    | IOB25[A] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-8/3   | -            | in    | IOB25[B] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-7/3   | -            | in    | IOB29[A] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
p1-6/3   | -            | in    | IOB29[B] | -               | LVCMOS18 | -     | UP        | -         | -          | -          | -          | -               | -             | -    
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
35/2     | tmds_d_p[2]  | out   | IOR2[A]  | RPLL_T_in       | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
34/2     | tmds_d_n[2]  | out   | IOR2[B]  | RPLL_C_in       | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
33/2     | -            | in    | IOR9[B]  | GCLKC_2         | LVCMOS18 | NA    | UP        | ON        | NONE       | NA         | NA         | NA              | NA            | 3.3  
32/2     | tmds_d_p[1]  | out   | IOR11[A] | GCLKT_3         | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
31/2     | tmds_d_n[1]  | out   | IOR11[B] | GCLKC_3         | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
30/2     | tmds_d_p[0]  | out   | IOR15[A] | -               | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
29/2     | tmds_d_n[0]  | out   | IOR15[B] | -               | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
28/2     | tmds_clk_p   | out   | IOR17[A] | -               | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
27/2     | tmds_clk_n   | out   | IOR17[B] | -               | LVCMOS33D | 8     | NONE      | NA        | NA         | NA         | NA         | OFF             | NA            | 3.3  
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
=========================================================================================================================================================================================


