Power Messages

Report Title Power Analysis Report
Design File /home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/hdmi_720p/impl/gwsynthesis/hdmi.vg
Physical Constraints File /home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/hdmi_720p/src/hdmi.cst
Timing Constraints File /home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/hdmi_720p/src/hdmi.sdc
Tool Version V1.9.11
Part Number GW1NSR-LV4CQN48PC6/I5
Device GW1NSR-4C
Created Time Tue Apr 8 14:17:08 2025
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade Commercial
Process Typical
Ambient Temperature 25.000
Use Custom Theta JA false
Heat Sink None
Air Flow LFM_0
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Related Vcd File
Related Saif File
Filter Glitches false
Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125

Power Summary

Power Information:

Total Power (mW) 16.251
Quiescent Power (mW) 11.060
Dynamic Power (mW) 5.190

Thermal Information:

Junction Temperature 25.608
Theta JA 40.580
Max Allowed Ambient Temperature 84.392

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 1.200 3.305 3.252 7.869
VCCX 3.300 0.192 1.584 5.861
VCCIO12 1.200 0.019 0.117 0.163
VCCIO18 1.800 0.002 0.108 0.198
VCCIO33 3.300 0.171 0.484 2.161

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.136 NA 3.148
IO 3.773 2.305 13.425
BSRAM 0.069 NA NA
PLL 3.515 NA NA

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
top 3.720 3.720(3.720)
top/Gowin_PLLVR_inst/ 3.515 3.515(0.000)
top/svo_hdmi_inst/ 0.203 0.203(0.203)
top/svo_hdmi_inst/svo_enc/ 0.033 0.033(0.000)
top/svo_hdmi_inst/svo_tcard/ 0.095 0.095(0.000)
top/svo_hdmi_inst/svo_tmds_0/ 0.025 0.025(0.000)
top/svo_hdmi_inst/svo_tmds_1/ 0.024 0.024(0.000)
top/svo_hdmi_inst/svo_tmds_2/ 0.025 0.025(0.000)
top/u_Reset_Sync/ 0.002 0.002(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
NO CLOCK DOMAIN 0.000 0.000
u_div_5/clkdiv_inst/CLKOUT.default_gen_clk 25.200 0.206
Gowin_PLLVR_inst/pllvr_inst/CLKOUT.default_gen_clk 126.000 0.002
clk_osc 27.000 3.515