Power Messages

Report Title	Power Analysis Report
Design File	/home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/UART_RX_1BYTE/impl/gwsynthesis/uart_rx.vg
Physical Constraints File	/home/quang1806/Desktop/USING FOR UPDATE CODE GITLAB/onekiwi_fpga_board/fpga_4k/Example code/UART_RX_1BYTE/src/uart_rx.cst
Timing Constraints File	---
Tool Version	V1.9.11
Part Number	GW1NSR-LV4CQN48PC6/I5
Device	GW1NSR-4C
Created Time	Tue Apr 22 18:29:38 2025
Legal Announcement	Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade	Commercial
Process	Typical
Ambient Temperature	25.000
Use Custom Theta JA	false
Heat Sink	None
Air Flow	LFM_0
Use Custom Theta SA	false
Board Thermal Model	None
Use Custom Theta JB	false
Related Vcd File
Related Saif File
Filter Glitches	false
Default IO Toggle Rate	0.125
Default Remain Toggle Rate	0.125

Power Summary

Power Information:

Total Power (mW)	10.656
Quiescent Power (mW)	10.308
Dynamic Power (mW)	0.348

Thermal Information:

Junction Temperature	25.381
Theta JA	40.580
Max Allowed Ambient Temperature	84.619

Supply Information:

Voltage Source	Voltage	Dynamic Current(mA)	Quiescent Current(mA)	Power(mW)
VCC	1.200	0.077	3.248	3.990
VCCX	3.300	0.050	1.584	5.393
VCCIO18	1.800	0.050	0.658	1.273

Power Details

Power By Block Type:

Block Type	Total Power(mW)	Static Power(mW)	Average Toggle Rate(millions of transitions/sec)
Logic	0.032	NA	6.250
IO	1.581	1.265	17.188

Power By Hierarchy:

Hierarchy Entity	Total Power(mW)	Block Dynamic Power(mW)
uart_rx_test	0.032	0.032(0.031)
uart_rx_test/uart_byte_rx/	0.021	0.021(0.000)
uart_rx_test/uart_byte_tx/	0.010	0.010(0.000)

Power By Clock Domain:

Clock Domain	Clock Frequency(Mhz)	Total Dynamic Power(mW)
clk	50.000	0.033