Power Messages
| Report Title | Power Analysis Report |
| Design File | C:\Users\ADMIN\Desktop\onekiwi_fpga_board-main\fpga_1P5\EXAMPLE CODE\UART_transmit_receive_multiple_byte\impl\gwsynthesis\uart_loopback.vg |
| Physical Constraints File | C:\Users\ADMIN\Desktop\onekiwi_fpga_board-main\fpga_1P5\EXAMPLE CODE\UART_transmit_receive_multiple_byte\src\uart_loopback.cst |
| Timing Constraints File | --- |
| Tool Version | V1.9.11.03 (64-bit) |
| Part Number | GW1N-UV1P5QN48XFC7/I6 |
| Device | GW1N-1P5 |
| Device Version | C |
| Created Time | Wed Jul 30 11:57:27 2025 |
| Legal Announcement | Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved. |
Configure Information:
| Grade | Commercial |
| Process | Typical |
| Ambient Temperature | 25.000 |
| Use Custom Theta JA | false |
| Heat Sink | None |
| Air Flow | LFM_0 |
| Use Custom Theta SA | false |
| Board Thermal Model | None |
| Use Custom Theta JB | false |
| Related Vcd File | |
| Related Saif File | |
| Filter Glitches | false |
| Default IO Toggle Rate | 0.125 |
| Default Remain Toggle Rate | 0.125 |
Power Summary
Power Information:
| Total Power (mW) | 52.259 |
| Quiescent Power (mW) | 51.563 |
| Dynamic Power (mW) | 0.696 |
Thermal Information:
| Junction Temperature | 27.355 |
| Theta JA | 37.300 |
| Max Allowed Ambient Temperature | 82.645 |
Supply Information:
| Voltage Source | Voltage | Dynamic Current(mA) | Quiescent Current(mA) | Power(mW) |
|---|---|---|---|---|
| VCC | 3.300 | 0.114 | 13.500 | 44.924 |
| VCCX | 3.300 | 0.063 | 1.500 | 5.158 |
| VCCIO18 | 1.800 | 0.063 | 1.147 | 2.176 |
Power Details
Power By Block Type:
| Block Type | Total Power(mW) | Static Power(mW) | Average Toggle Rate(millions of transitions/sec) |
|---|---|---|---|
| Logic | 0.162 | NA | 6.250 |
| IO | 2.849 | 2.320 | 13.542 |
Power By Hierarchy:
| Hierarchy Entity | Total Power(mW) | Block Dynamic Power(mW) |
|---|---|---|
| uart_loopback | 0.162 | 0.162(0.162) |
| uart_loopback/uart_data_rx/ | 0.110 | 0.110(0.057) |
| uart_loopback/uart_data_rx/uart_byte_rx/ | 0.057 | 0.057(0.000) |
| uart_loopback/uart_data_tx/ | 0.052 | 0.052(0.024) |
| uart_loopback/uart_data_tx/uart_byte_tx/ | 0.024 | 0.024(0.000) |
Power By Clock Domain:
| Clock Domain | Clock Frequency(Mhz) | Total Dynamic Power(mW) |
|---|---|---|
| Clk | 50.000 | 0.167 |